1/9 semiconductor technical data KMB7D0NP30QA n and p-ch trench mosfet revision no : 3 general description switching regulator and dc-dc converter applications. its mainly suitable for back-light inverter. features ? n-channel : v dss =30v, i d =7a. : r ds(on) =23.5m ? (max.) @ v gs =10v : r ds(on) =39m ? (max.) @ v gs =4.5v ? p-channel : v dss =-30v, i d =-5a. : r ds(on) =45.5m ? (max.) @ v gs =-10v : r ds(on) =80m ? (max.) @ v gs =-4.5v ? super high dense cell design. ? reliable and rugged. maximum rating (ta=25 ? ) characteristic symbol n-ch p-ch unit drain-source voltage v dss 30 -30 v gate-source voltage v gss ?? 20 ?? 20 v drain current dc i d * 7 -5 a pulsed (note1) i dp 29 -20 source-drain diode current i s 1.7 -1.7 a drain power dissipation p d * 2 w maximum junction temperature t j 150 ? storage temperature range t stg -55 ?- 150 ? thermal resistance, junction to ambient r thja * 62.5 ? /w 2011. 3. 18 pin connection (top view) note : *sorface mounted on fr4 board
2011. 3. 18 2/9 KMB7D0NP30QA revision no : 3 electrical characteristics (ta=25 ? ) characteristic symbol test condition min. typ. max. unit static drain-source breakdown voltage bv dss i d =250 a, v gs =0v, n-ch 30 - - v i d =-250 a, v gs =0v, p-ch -30 - - drain cut-off current i dss v gs =0v, v ds =24v n-ch - - 1 a v gs =0v, v ds =-24v p-ch - - -1 gate leakage current i gss v gs = ?? 20v, v ds =0v n-ch - - ?? 100 na p-ch - - ?? 100 gate threshold voltage v th v ds =v gs, i d =250 a n-ch 1.0 - 3 v v ds =v gs, i d =-250 a p-ch -1.0 - -3 drain-source on resistance r ds(on) * v gs =10v, i d =7a n-ch - 18 23.5 m ? v gs =-10v, i d =-5a p-ch - 35 45.5 v gs =4.5v, i d =6a n-ch - 30 39 v gs =-4.5v, i d =-4a p-ch - 62 80 on state drain current i d(on) * v gs =4.5v, v ds =5v n-ch 20 - - a v gs =-10v, v ds =-5v p-ch -20 - - forward transconductance g fs * v ds =5v, i d =6.6a n-ch - 10 - s v ds =-5v, i d =-5a p-ch - 9 - source-drain diode forward voltage v sd * i s =1.7a, v gs =0v n-ch - 0.7 1.2 v i s =-1.7a, v gs =0v p-ch - -0.8 -1.2
2011. 3. 18 3/9 KMB7D0NP30QA revision no : 3 note 1>* pulse test : pulse width ?a 300 ? , duty cycle ?a 2%. electrical characteristics (ta=25 ? ) characteristic symbol test condition min. typ. max. unit dynamic total gate charge q g n-ch : v ds =15v, i d =6.6a, v gs =10v (fig.1) p-ch : v ds =-15v, i d =-5a, v gs =-10v (fig.3) n-ch - 16.4 20.5 nc p-ch - 13 16 n-ch : v ds =15v, i d =6.6a, v gs =4.5v (fig.1) p-ch : v ds =-15v, i d =-5a, v gs =-4.5v (fig.3) n-ch - 7.2 9 p-ch - 6.25 7.8 gate-source charge q gs n-ch : v ds =15v, i d =6.6a, v gs =10v (fig.1) p-ch : v ds =-15v, i d =-5a, v gs =-10v (fig.3) n-ch - 4 - p-ch - 2.6 - gate-drain charge q gd n-ch - 2.6 - p-ch - 2.9 - turn-on delay time t d(on) n-ch : v dd =15v, i d =6.6a, v gs =10v, r g =3 ? (fig.2) p-ch : v dd =-15v, v gs =-10v, r g =3 ? , r l =2.7 ? (fig.4) n-ch - 7.4 - ns p-ch - 4.7 - turn-on rise time t r n-ch - 27.7 - p-ch - 7.8 - turn-off delay time t d(off) n-ch - 12.2 - p-ch - 47.2 - turn-off fall time t f n-ch - 7.6 - p-ch - 22.6 - input capacitance c iss n-ch : v ds =15v, v gs =0v, f=1.0mhz p-ch : v ds =-15v, v gs =0v, f=1.0mhz n-ch - 742 - pf p-ch - 820 - output capacitance c oss n-ch - 126 - p-ch - 137 - reverse transfer capacitance c rss n-ch - 76 - p-ch - 89 -
2011. 3. 18 4/9 KMB7D0NP30QA revision no : 3
2011. 3. 18 5/9 KMB7D0NP30QA revision no : 3
2011. 3. 18 6/9 KMB7D0NP30QA revision no : 3
2011. 3. 18 7/9 KMB7D0NP30QA revision no : 3
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2011. 3. 18 9/9 KMB7D0NP30QA revision no : 3
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